Digital Systems Design - EENG6730

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Module delivery information

Location Term Level1 Credits (ECTS)2 Current Convenor3 2024 to 2025
Combined Autumn and Spring Terms 6 15 (7.5) Philippos Assimakopoulos checkmark-circle


This module looks at the methodology of designing and implementing large digital systems. Students taking this module will learn how to design reliable digital systems using synchronous design techniques, will learn how to design digital systems which are easily testable and will be able to use a range of software tools to synthesize digital systems.


Contact hours

Total contact hours: 36
Private study hours: 114
Total study hours: 150

Method of assessment

Examination 60%
Coursework 40%

Indicative reading

Core Text
• Rushton, Andrew (c2011) VHDL for logic synthesis, Wiley-Blackwell, Oxford
Recommended Reading
• Ercegovac, Milos D., Lang, Toma´s, Moreno, Jaime H (1999) Introduction to digital systems
• Roth, Charles H., John, Lizy Kurian (c2008) Digital systems design using VHDL. Thomson, London, Toronto, Ontario
• Pedroni, Volnei A. (2008) Digital electronics and design with VHDL, Elsevier Science [distributor], Morgan Kaufmann, Oxford, San Francisco, Calif
• Kaeslin, Hubert (c2008) Digital integrated circuit design: from VLSI architectures to CMOS fabrication, Cambridge University Press, Cambridge.
• Weste, Neil H. E., Harris, David Money, (c2011) Integrated circuit design, Peason. Boston, Mass, London.
• Kishore, K. Lal, Prabhakar, V.S.V. (2009) VLSI Design, I K International Publishing House Pvt. Ltd, New Delhi.
• Das, Debaprasad (2010) VLSI design, Oxford University Press, New Delhi
• Chandrasetty, Vikram Arkalgud (2011) VLSI design: a practical guide for FPGA and ASIC implementations, Springer, London, New York
• Wu, Banqiu, Kumar, Ajay, Ramaswami, Sesh (2011) 3D IC stacking technology, McGraw-Hill Professional, New York.

See the library reading list for this module (Canterbury)

Learning outcomes

On successfully completing the module students will be able to:
1. design reliable digital systems using synchronous design techniques.
2. design digital systems which are easily testable.
3. appreciate a range of software for synthesis of digital systems.
4. Understand the major engineering problems associated with building high speed digital systems and how they are solved


  1. Credit level 6. Higher level module usually taken in Stage 3 of an undergraduate degree.
  2. ECTS credits are recognised throughout the EU and allow you to transfer credit easily from one university to another.
  3. The named convenor is the convenor for the current academic session.
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