Reconfigurable Architectures - EL893

Location Term Level Credits (ECTS) Current Convenor 2019-20
Canterbury Autumn
View Timetable
7 15 (7.5)

Pre-requisites

None

Restrictions

None

2019-20

Overview

An Introduction to reconfigurable systems. PLDs, PLAs, FPGAs. Fine grain architectures, Coarse grain architectures, Heterogeneous device Architectures. Case studies. Configuration of FPGA's. Run-time configuration, partial configuration, dynamic reconfiguration. Partitioning systems onto a reconfigurable fabric. Synthesis tools. Timing issues. Verification and Test strategies.

An introduction to Hardware Description Languages. VHDL will be used to illustrate a typical HDL (but this may change to or include Verilog in future). The lectures will define the architectural aspects of a VHDL : entity, architecture, process, package, types, operators, libraries, hierarchy, test benches and synthesisable VHDL. Workshops and laboratories will be used to illustrate how VHDL code is synthesised on to physical hardware devices and a number of challenging practical design examples will be used to illustrate the process.

Basic computer arithmetic and its implementation on reconfigurable logic architectures. Fixed-point and Floating point number representations. The IEEE-754 FP standard. Redundant Number Systems. Residue Number Systems. Methods for Addition and Subtraction. Fast adder architectures. Multi-operand addition. Multiplication: Multiplier architectures; Constant coefficient multipliers; Distributed arithmetic; LUT methods. Special methods: division, square root, the CORDIC algorithm. High-throughput arithmetic. Low-power arithmetic.

Details

This module appears in:


Contact hours

Total contact hours: 66
Private study hours: 84
Total study hours: 150

Method of assessment

Assignment (12%)
Assignment (18%)
Examination (70%)

Indicative reading

See the library reading list for this module (Canterbury)

Learning outcomes

1. Systematically and comprehensively understand reconfigurable architectures including CPLD, FPGA and coarse-grained devices.
2. Design, model and verify digital systems using VHDL/Verilog and vendor specific logic synthesis tools and devices.
3. Demonstrate critical appraisal in the implementation, testing and debugging of complex digital designs on hardware
4. Comprehensively understand modern heterogeneous Programmable Systems on Chip (PSOC) architectures and devices.

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